Tualatin
The first Celeron based on Intel's 0.13-micron Tualatin core debuted at the beginning of 2002 at 1.2GHz. Given that the Tualatin's future in the mainstream desktop arena had been all but completely undermined by the Pentium 4 by the time of its release, there was speculation that the new core might find a niche in the budget CPU market. However, for this to happen required that Tualatin's potential for moving the Celeron family forward to a 133MHz FSB to be realised. The prospects of this were not encouraging though, with both the debut CPU and the 1.3MHz version released in early 2002 being restricted to a 100MHz FSB and use of PC100 memory modules.
It subsequently became apparent that even for the Celeron the Tualatin would be no more than a stopgap, only taking the range to 1.5GHz. At that point it appeared that the plan was for the Pentium 4 Willamette core to move to the value sector, address the long-standing FSB bottleneck and take the Celeron family to 1.8GHz and beyond. If this turns out to be the case then it means that FC-PGA2 motherboards will have had a very short life span indeed!
NetBurst-class CPUs
It subsequently became apparent that even for the Celeron the Tualatin would be no more than a stopgap, only taking the range to 1.5GHz. At that point it became apparent that the plan was for the Pentium 4 Willamette core to move to the value sector, address the long-standing FSB bottleneck and take the Celeron family to 1.8GHz and beyond. The first Pentium 4 based Celeron duly arrived in May 2002.
Based on the 0.18 micron Willamette core, the next series of Celerons were, in consequence, a completely different design. Often referred to as Celeron 4, they had 128 KB rather than 256KB or 512KB of L2 cache, but are otherwise very similar. Their performance suffered considerably as a result of their smaller caches and in general, this first generation of P4-based Celerons were not well received. However, some speed grades were favoured in the enthusiast market, because like the old 300A, they ran well above their rated speeds.
By the end of 2002 the Celeron had been upgraded to the 0.13-micron Northwood core, allowing it to run at much higher speeds and cooler than before. However, even with a full 512K L2 cache in the Northwood design, Intel stuck with the 128K cache for the Celeron 2.0 GHz and the new Celeron remained stuck on the 400 MHz bus.
The last and fastest Northwood-based Celeron was released in the spring of 2004, clocked at 2.8GHz.
Celeron D
Intel's competitiveness in the value chip arena was given a considerable boost in mid-2004, with the Celeron's transition to the company's 90nm Prescott core. As though in recognition of the fact, the new processors were marketed under the name Celeron D, to distinguish them from previous generations. At the time of their release, compatible motherboards required either the Intel 845 or 865 chipset families.
Compared with previous NetBurst versions of the processor, the Celeron D chips have a twice as large L1 data cache and L2 cache (16KB and 256KB respectively), support of additional SSE3 SIMD instructions, a faster 533MHz bus and all other architectural improvements resulting from the shift to 90nm process technology. While the Prescott's longer pipelines mean that it takes longer for the data to travel through the Prescott core than the Northwood at the same clock speed, the former's 90nm process technology will allow Celeron D chips to be clocked significantly faster than their predecessors.
The Celeron Ds have a 3xx model number (compared to 5xx for Pentium 4s and 7xx for Pentium Ms). As of March 2006 the range extended from 310 to 355, covering a number of speed grades between 12.13GHz and 3.33GHz. From the release of the Celeron D 351 in early 2006, support for Intel's EM64T technology and the Execute Disable Bit feature - designed to combat malicious "buffer overflow" attacks - became default features. Model numbers increased by 1 over the previous generation (330 -> 331), and were only manufactured for socket 775. Up until then, while all Celeron chips had hardware-level support of EM64T by virtue of it also being built into the Prescott core, the feature had been disabled.
Intel's first 65nm desktop Celeron D chips, based on the Cedar Mill core, are expected to provide 512KB of L2 cache, double that of Celeron D family members hitherto, run across 533MHz frontside bus and support 64-bit computing. The chips are slated for release by mid-2006, carrying model numbers of 352 and 356, with clock speeds of 3.2GHz and 3.33GHz respectively.
These are likely to be the final products to carry the Celeron name, with future budget Intel processors being expected to adopt the Intel Core Solo/Duo branding.
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